The detection theory of threshold voltage for MOS transistor is to utilize the delay time of delay chains to detect a variety of combinations of process corners such as FF(fast NMOS-fast PMOS), FS(fast NMOS-slow PMOS), TT(typical NMOS-typical PMOS), SS(slow NMOS-slow PMOS) and SF(slow NMOS-fast PMOS). The delay chains are composed of a plurality of inverters, and each of the inverters comprises an NMOS transistor and a PMOS transistor. Once a rise-time measurement based on mentioned structure is proceeding, the measurement results of the rise time of the SS corner and FS corner would be very close. Comparatively, once a fall-time measurement based on mentioned structure is proceeding, the measurement results of the fall time of the SS corner and SF corner would be very close. In this case, the delay chains can not detect all sorts of combinations of process corners precisely.